CS302 Digital Logic & Design GDB Solution Fall 2013

“An electric power supply company is going to make a power line network to monitor the power supply and line losses. For monitoring system to be deployed with this network, which integrated technology will be a better choice, as CMOS and TTL are widely used in different scenarios? Support you views with reasons. You may also point out a technology (if any) other than CMOS and TTL but with reasons.”

Solution: Characteristics of CMOS logic:

1. Dissipates low power: The power dissipation is dependent on the power supply voltage, frequency, output load, and input rise time. At 1 MHz and 50 pF load, the power dissipation is typically 10 nW per gate.

2. Short propagation delays: Depending on the power supply, the propagation delays are usually around 25 nS to 50 nS.

3. Rise and fall times are controlled: The rise and falls are usually ramps instead of step functions, and they are 20 – 40% longer than the propagation delays.

4. Noise immunity approaches 50% or 45% of the full logic swing.

5. Levels of the logic signal will be essentially equal to the power supplied since the input impedance is so high.

Characteristics of TTL logic:

1. Power dissipation is usually 10 mW per gate.

2. Propagation delays are 10 nS when driving a 15 pF/400 ohm load.

3. Voltage levels range from 0 to Vcc where Vcc is typically 4.75V – 5.25V. Voltage range 0V – 0.8V creates logic level 0. Voltage range 2V – Vcc creates logic level 1.

CMOS compared to TTL:

1. CMOS components are typically more expensive than TTL equivalents. However, CMOS technology is usually less expensive on a system level due to CMOS chips being smaller and requiring less regulation.

2. CMOS circuits do not draw as much power as TTL circuits while at rest.  However, CMOS power consumption increases faster with higher clock speeds than TTL does.  Lower current draw requires less power supply distribution, therefore causing a simpler and cheaper design.

3. Due to longer rise and fall times, the transmission of digital signals becomes simpler and less expensive with CMOS chips.

4. CMOS components are more susceptible to damage from electrostatic discharge than TTL components.

A new single power supply 10bit video Bi-CMOS sample-and-hold IC is described. High speed, low power and high-accuracy sample-and-hold operation has been achieved using the complementary connected buffer type sample switch. The equivalent PNP transistor is formed by the combination of NPN and PMOS transistors. The sample-and-hold IC has been implemented in 1.2um Bi-CMOS technology. The acquisition time and the switching settling time are 20ns and 15ns, respectively. It works with +5V single power supply and the power dissipation is 150mW.