CS501 Advance Computer Architecture Assignment 3 Solution Fall 2012

Question:

An I/O device transfers data at a rate of 5MB/s over a 100MB/s bus. The data is transferred in 5KB block. If the processor operates at 400MHz, and it takes a total of 4000 cycles to handle each DMA request, find the fraction of CPU time handling the data transfer with and without DMA.

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