CS501 Advance Computer Architecture Assignment 4 Spring 2013

Question: Marks 20
Keeping in view the stages of pipelining, explain X3, Y3, Z4 and Z5 registers.

Addresses Instructions
100 sub r1, r2, r3
104 ld r5, [5(r7)
108 br r6
112 str r4, 56

200

Further you are required to explain how the given SRC (Simple RISC computers) code will be executed through the five stages of a pipelined processor.

Marking scheme (Total marks 20)
5 marks (X3, Y3, Z4 and Z5)
3 marks for each step (3*5 = 15)

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