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CS501 VU Current Midterm Fall 2012 Paper 9 December 2012

What is NOP instruction and its significance in pipelining?  3

Which register hold the instruction that is being executed?  2

Write the structural RTL for the mov immediate instruction for the mov immediate instruction for uni-bus data path implement Mov ra,c2  3 marks

structural RTL out ra c2 nu instruction?   5 marks

Which register hold the address of the next instruction to be executed in the processor?

What do you aboyt Machie Exception ?


Another Paper:

What do you know about Machine Exception?

.Write the structure RTL description for the uni-bus data path implementation Jump[ra+2] (5 Marks)

Consider the following sequence of the instructions giving through the pipelined version of SRC
200:shl r6,r3,5
204:str r7,30
208:sub r2,r4,r5
2012:add r1,r2,r3
216:id r7,48

What function is performed by the reset operation of a processor and differentiate Hard reset and Soft reset?

structural RTL out ra,c2 3marks

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